Navitas Semiconductor’s latest GeneSiC MOSFETs exceed AEC-Q101 standards, extending lifetime in automotive and industrial systems. Based on trench-assisted planar technology, they are available in HV-T2Pak top-side cooled packages with 6.45-mm creepage and a CTI above 600 V, supporting IEC-compliant operation up to 1200 V.
Navitas uses the term AEC-Plus to designate parts that exceed the AEC-Q101 reliability tests published by the Automotive Electronics Council (AEC), based on multi-lot stress-test results. This in-house benchmark layers additional stress conditions onto standard AEC-Q101 and JEDEC protocols to better mirror real-world automotive and industrial mission profiles by:
- Incorporating dynamic reverse bias (D-HTRB) and dynamic gate switching (D-HTGB) tests
- Running power- and temperature-cycling for over twice the standard duration
- Extending static high-temperature, high-voltage tests (HTRB, HTGB) to over three times the AEC-Q101 interval
- Qualifying parts to 200 °C TJMAX for improved overload capability
Housed in the 14×18.5-mm HV-T2Pak, the initial portfolio includes 1200-V devices with on-resistance from 18 mΩ to 135 mΩ and 650-V devices ranging from 20 mΩ to 55 mΩ. Lower on-resistance (<15 mΩ) SiC MOSFETs in the same package will follow later in 2025. For more information on GeneSiC MOSFETs, click here.
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